Best Guideline for Differential Pair Routing in High Speed PCB?

In this tutorial we are going to learn about Best Guideline for Differential Pair Routing in High Speed PCB?

In High Speed PCB Design have some device technologies utilizes differential techniques, its worth explaining some of the advantages & key layout aspects of differential circuitry & comparing them to similar single ended op-amp circuitry. Differential circuitry is superior to single ended circuitry for a number of reasons. The differential inputs of common mode rejection lets balanced circuitry reject common mode interference, including GND noise that would be amplified by single ended circuits. Also, a differential circuit’s balanced properties usually reduce non-linearity & improve distortion. In addition, some ICs with differential outputs (such as today’s single supply DACs) have inherent common-mode output noise which is cancelled when the DAC is followed by a differential-input amplifier or filter. Because a differential signal’s 2 conductors carry a balanced signal, reduced EMI generation & reduced susceptibility to magnetic pickup because it is reduced loop area which are additional benefits of differential circuitry. Even “quasi-differential” circuitry, with its GND taken adjacent to a single ended source but shipped to a differential load as if it were the II half of a differential signal, is superior to single ended circuitry. This is because the small common mode interfering currents between the source & load are still reduced by the differential input. For examples of these concepts. Note that the single-ended connection in standard op amp, although it could also apply to single ended connections into Devices gain blocks if the GND referenced signals were instead referred to 2.5 volts.

In general, the rules fall into one or more of these five categories:

  • Planes: For plane must be a continuous power system plane underneath the differential pair.
  • Length: For Length should be taken to ensure that differential traces are of equal length.
  • Spacing 1: Care must be taken to place the traces as close together as possible.
  • Spacing 2: Care must be taken to ensure that the spacing between traces is constant everywhere along the length of the traces.
  • Impedance: Differential impedance rules must be applied.

A = Width of a single trace in differential pair
S = Space between two trace of a differential pair
D = Space between two adjacent differential pair

              Make D > 2S to minimize crosstalk.


 S: Space between the two traces of a Differential Pair

  D: Space between two adjacent differential pair

2) Route the 2 traces of a differential pair as close to each other as possible after they leave the device to ensure minimal reflection.

3) Maintain a constant distance between the 2 traces of a differential pair over their entire length.

4) Keep the electrical length between the 2 traces of a differential pair the same. This minimizes the skew and phase difference.

5) To minimize impedance mismatch and inductance, avoid using vias. To minimize the crosstalk, keep the traces for the differential pairs as short as possible. If the pair has to be routed for an extended length, observe the following guidelines.

  • Keep the differential pairs as far away as possible to eliminate cross talk between the pair.
  •  Always place a ground strip on the top layer to separate the differential pairs.
  •  Use vias to connect the top layer GND strip to the bottom plane extensively(every several hundred mils)
  •  Make sure the distance of the differential pairs constant when routing the signal.
  •  Keep the distance of the differential pairs to the ground strip as a constant.
  • Try to match the length of the differential pairs.
  • When do the routing then terminate the RX pair closer to the Rx pins of IC chips rather than to the transformer. This is because the crosstalk current depends on the physical layout of the signals & the characteristics of the board. The voltage strength of the crosstalk signal is equal to the impedance of the load times to the crosstalk current. The higher the input load, the higher the crosstalk created on the same board. Because it is impossible on the board to match the input impedance. It’s better to keep the trace from the termination to the input as short as possible.

About EEE

We have designing Experience for the last 40 years.

Leave a Reply