# What is Via in High-Speed PCB Design?

In this tutorial we are going to learn about What is Via in High-Speed PCB Design?

What is via?

Vertical interconnect Access (VIA)

• An electrical connection between layers to pass a signal from one layer to the other.
• Single layer designs do not require vias and these are only for multi-layer PCBs or packages to route signals

Why Use Via?

• Via generate discontinuity from the signal transition and significantly affect signal and power integrity in high speed designs
• Parasitic capacitance o via can increase signal rise time , making the signal speed slower
• Designers should maintain a good impedance transition

Types of VIA

PTH, Blind, buried, and μ-vias

-By physical implementation….

• PTH (plated through hole) via
• Blind via
• Buried via

-By signally

• Single-ended via
•   Differential via
•   Signal via
•   Ground via

Anatomy of via

Via barrel

• Conductive tube filling the drilled hole

• Connects every end of the barrel to the component, plane, or trace.

• Clearance hole between Metal layer & barrel  to which it is not connected

• Internal or external pads that are not connected to any traces or components

Return current path for Vias

• The return current must find a path to return to the source
•   At high frequencies, return currents will favor the path (s) of least impedance
• Due to the skin effect, the current flows along the metal surface, not penetrating through
• The closer the ground via to the signal via, the smaller the inductance of via is

Electrical model for vias

• There should be not  simple via model for multi-gigabit signals or higher frequencies
• Lumped or distributed
• Is the via inductive, capacitive or something else?
• For example, can we say that the impedance of three cases below are the same?
• The answer is “it depends”

The return path affects the impedance characteristic of via

Via Impedance By Various Return Path

Simple single ended via w/o pads case

Test structure

• Substrate thickness =100mil
• Substrate material =FR-4
• 6 metal layers
• Via barrel radius = 5 mil

Tested for:

• Various sizes of via anti-pads
• Various number of ground vias

TDR (t) or impedance, Z(f)

•  TDR (Time Domain Reflectometry)
• Plots impedance vs. time or distance
• The lower resolution depends on the rise time of step signal or signal bandwidth

LMIN=TR*CQ/2* R, BW=0.35/TR

Example: TR=10ps ER=4-LMIN =0.75mm or 29.53mil

• Therefore , it is challenging to use TDR for the via itself since the feature size of via is typically very small impedance z
• Plots impedance vs. frequency
• Shows frequency dependent impedance characteristic

As a coaxial transmission line

• In coaxial transmission lines, the electric and magnetic fields are transverse to the direction of propagation, which makes TEM wave propagation
• Capacitance per unit length

– C=2πl/in(b/a) in(b/a) [F/M]

• Inductance per unit length

–  L=μ0/2π in(b/a)[H/M]

• Characteristic impedance

–  Z0= =1/2π 0/ԑ In (b/a)

• Phase constant

–   β=w =w 0ԑ

• Propagation velocity

–       VP=ῳ/β=1 0Z=C 1

Transmission Line Routing With Via

Micro strip input +Via +micro strip output

• The impedance of the full wave EM result(blue) is not the same as the cascaded impedance (red) of three sections, “micro strip+ via+ micro strip “
• This is due to the dangling tail edge of the micro strip transmission line close to the via , which adds inductance to the impedance

How Much of Inductance

• Estimating Micro strip to via transition
• The inductance value can be simply extracted by matching the impedance between full wave and cascaded results with additional inductors
• The estimated inductance for the transition is 0.22nh in this case
• This inductance can be compensated by decreasing the via anti-pads or increasing via pads

Improving impedance match

• Smaller radius should be  the via anti –pad could improve the impedance match performance by providing a little more capacitance
•  However , the impedance variation (profile) is complex behavior ; so many other possible approaches may be available –for instance , a larger via pad

Via Stub

Stub Resonance

• A dangling via stub acts as acts as a stub resonator, similar to a series LC resonator
• At a quarter wavelength , the impedance turns into short impedance ;therefore , the insertion loss at that frequency
• Depending on the Q value , the loss at other frequencies can be significant as shown in the DB (s21)plot

Stub Resonance vs. Stub Length

• The resonance frequency varies with the length of the Stub
• By making the stub length shorter (movie the strip layer down), the stub resonance frequency can be pushed up to a higher frequency

Estimating Via Stub Resonance Frequency

First order approximation formula

• Fresonance=1.18*e9/4*stub length * R[Stub length in inch unit]
• Example :93mil stub – 14.79GHz

Back Stub

• The via stub resonance can be removed or pushed up to a higher frequency by back-drilling the via.
• The stub resonance at 15GHz with 3rd layer strip line case is completely removed by the back-drilling.

Differential Via

Differential signaling Via

• Two single-ended vias used for differential signaling.
• The minimum via patch size is determined by the manufacturing specification.
• The coupling (overlap of E,H field lines) changes the differential impedance Zdiff =2*(zo-∆z)
• The larger the coupling (light coupling)is , the lower the differential impedance is

Differential via crosstalk

• Tight coupling vs. loose coupling
• If have Tight coupling  then there will be  less area , but with a little higher loss
• Tight coupling is also better for crosstalk performance
• Tight coupling is minimum  sensitive to common signal noise

Main Point of Via:

• It should be prefer vias as coaxial transmission lines to maintain good impedance match.
• Via stubs act as a series LC resonator , adding significant loss to channels, that can be minimized by back-drilling the via stubs
• Differential vias are used for differential signaling with a tight coupling more favored.
• Tools for modeling vias:
• ADS: design environment for high speed PCB analysis
• Translate/convolution & s-parameter circuit simulators
• FEM: finite element method.
• Momentum: 3D planner EM simulator.
• Via designer : new utility in ADS 2017 (coming this summer)
• EMPro:3D modelling and EM simulation environment.
• FEM: Finite element method EM simulator.
• FDTD: Finite difference time domain EM simulator.